Frequently Asked Questions Q: What Is Symetrical Multi-Processing?A: If you are using an operating system which supports symmetrical multi-processing (SMP), you can gain the additional performance boost of adding up to six CPUs to the computer. SMP allows several processors to work simultaneously in the same operating system to service interrupts, access computer memory, and perform I/O operations. Each time an instruction is received, it is processed by the CPU that is available at that moment. In this way, processing time is reduced, which greatly improves computer performance.
To get the most out of SMP, your applications must support multi-threading. Multi-threading means that the software performs many of its operations in parallel. It accomplishes this by beginning a new "thread" to perform a group of related operations, while the main portion of the program continues without waiting for the results of the thread. With multiple processors installed, a thread can begin on one processor while a second processor continues executing the main program. The more a program uses threads, the more performance boost the computer gets from having multiple processors installed. Conversely, if the program is written as a single thread of operation, it will not receive as much benefit from having multiple processors installed. If you are not sure whether or not your application is multi-threaded, contact your software manufacturer.
The Pentium Proâ processor featured in this computer is designed to support 32-bit operating systems and applications. To ensure optimum computer performance, use only 32-bit programs on the NS-9000. The Pentium Proâ processor was designed to directly support the interconnection of multiple processors. Each Pentium Proâ processor contains all the logic required to work in multiprocessor configuration.
The Pentium Proâ processor also features an L2 cache integrated on the chip to improve performance and to simplify computer design. The L2 cache is non-blocking, which means that the processor can keep processing other instructions even if it does not have the necessary data in the L2 cache. The L2 cache is also located on a separate "backside" bus which allows simultaneous access to both the L2 cache and main memory.