| Feature |
Specification |
| Scalability |
Up to 8-way |
| Socket |
Socket F (1207 pins) |
| Maximum CPU Power |
95 watts |
| Frequency |
2.4 GHz |
| Supported Power States |
Up to 5 |
| DDR2 Memory Type Supported |
Registered |
| DDR2 Memory Controller Width |
128-bit |
| DDR2 Memory Frequency |
DDR2-667, maximum |
| DDR2 Memory DIMM Support/CPU |
8 @ DDR2-533, maximum |
| HyperTransport Technology Links |
Total: 3 Coherent: 3 |
| HyperTransport Technology Link Width |
16 bits × 16 bits |
| HyperTransport Bus Frequency |
1 GHz |
| L1 Cache Size |
Data: 64 KB
Instruction: 64 KB |
| L2 Cache Size |
1 MB |
| Pipeline Stages |
Integer: 12
Floating point: 17 |
| L1/L2 Data Cache Protection |
ECC |
| L1/L2 Instruction Cache Protection |
Parity |
| Global History Counter Entries |
16 K |
| L1 TLB Entries |
Data: 40
Instruction: 40 |
| L1 TLB associativity |
Data: Full
Instruction: Full |
| L2 TLB entries |
Data: 512
Instruction: 512 |
| L2 Associativity |
Data: 4-way
Instruction: 4-way |
| SIMD Instruction Support |
SSE, SSE2, SSE3 |
| Process |
90 nanometer SOI |