Motherboard Programming
Part number 4000719,4000749,4000756,4000780

PCI configuration

System interrupts

SMI and NMI routing

There are numerous SMI/NMI sources, which are routed to OSB4 or SIO GPI input pins. Software must configure the OSB4 and SIO GPI input pins to control whether the corresponding events generate SMI, NMI, or wake-up events to the processors.

System management bus

This motherboard supports a simple IC-compatible bus to provide a method of managing system resources. To implement this feature, the RCC South Bridge device becomes the master controller and communicates with several other devices in the system.